Showing error on initiating to schematic and not showing rtl schematic view
Clash Royale CLAN TAG#URR8PPP
Showing error on initiating to schematic and not showing rtl schematic view
My code
library ieee;
use ieee.std_logic_1164.all;
entity LG is
port (A, B: in BIT; C: out BIT);
end;
architecture LG1 of LG is
begin
C<=A and B;
end;
is showing following error:
# Debug data file, vsim.dbg, does not exist.
#
# Invoke vsim with -debugDB to create this file.
# Debug data file, vsim.dbg, does not exist.
#
# Invoke vsim with -debugDB to create this file.
# Could not open the database because the required debug information has not been generated.
# Please refer to the documentation for additional details.
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